Senior ASIC/SOC/DSP Engineer

This company develops and markets highly complex SOC products for wireless applications. We are seeking an energetic hands-on ASIC Technical Lead with a proven track record for delivering ASIC chips. Responsibilities include: Take a lead role in defining and developing ASIC chips for wireless applications. Provide leadership in developing derivative and cost reduced products through design and technology upgrades. Work with marketing, systems, and test groups to insure timely execution of design from chip definition to tape out. Work with ASIC validation team for bring-up and testing of new silicon.

Qualified candidates will have 7+ years of experience in chip design with a minimum of a B.S. in EE; MSEE degree preferred. Excellent working knowledge of DSP ASIC design is required, as is a strong background in SOC design involving embedded processors, standard bus architectures, I/O protocols, and memory design. Candidates with strong communication and GPS background will be preferred. You must be capable of developing micro-architectures for modulation/demodulations schemes such as OFDM and spread spectrum technologies. Preference will be given to candidates with experience in low power design techniques. You must be capable and also have recent hands-on experience with RTL coding, simulation, synthesis, and static timing analysis. Candidates must have been closely involved with floor planning, place and route, timing closure, DFT, and ATE test vector generation. A proven track record of completing at least 3 full chip designs through tape out and validation is required, as is experience with chip debugging. In depth knowledge of ASIC design methodologies and tools is required.

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